Electronics devices such as computers, laptops, smartphones, tablets, televisions, and the like may have a need to shift the phase of a clock signal. Current circuits to shift the phase of the clock signal typically employ a D-type flip flop that has a D input, a Q output, and a trigger input. The D-type flip flop receives the clock signal at its D input, and a signal at its trigger input that corresponds to an inverted form of the clock signal with its frequency doubled. This circuit produces a version of the clock signal that is phase shifted by 90 degrees.
While this described phase shifting circuit may be useful in some situations, it suffers from the drawback that the phase shift is determined by the signal at its trigger input. Generation of the necessary signal at the trigger input to provide a desired phase shift may involve the use of a phase locked loop, and the associated complexity (as well as on-chip space) that is associated therewith.
Therefore, new circuits that shift the phase of the clock in other ways are desirable.